EDN

Clever FPGA partitioning

An increasing amount of system-on-chip design activity today seems to target field-programmable gate arrays (FPGAs) rather than application-specific ICs. Often this is simply an intermediate target to ...
Design-Reuse

General Partitioning Guidelines for Validation of Large ASIC Designs On FPGA

Rohit Goyal, Neha Singh; Freescale Semiconductor India Pvt. Ltd. Today, a lot of the system-on-chip (SoC) designs depend on Field-Programmable Gate Arrays (FPGAs) as a way to accelerate verification, ...
Semiconductor Engineering

Prototyping Partitioning Problems

Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a ...
EDN

Design compilation in hardware emulators

In this post, I focus on the compilation process in hardware emulators. Likewise, the design capacity in hardware emulators, also the compilation flow, is heavily dependent on the type of technology ...
Geeky Gadgets

TinyBeast Field-Programmable Gate Array (FPGA)

If you are searching for a small form factor Field-Programmable Gate Array complete with Mini PCIe you might be interested in the upcoming launch of the TinyBeast FPGA. Offering a PolarFire FPGA in ...
Semiconductor Engineering

Prototyping ARM Cortex-A Processors Using FPGA Platforms

With the increasing cost and complexity involved in new SoC (System-on-Chip) designs, FPGA (Field Programmable Gate Array) prototyping is becoming an increasingly important, or even crucial, part of ...
BizTech

What Is an FPGA? Understanding Field-Programmable Gate Arrays

Ernie Smith is a former contributor to BizTech, an old-school blogger who specializes in side projects, and a tech history nut who researches vintage operating systems for fun. When it comes to major ...